The invention relates to a method of forming an isolation region involved in a semiconductor device, and more particularly to a method of forming an isolation region comprising a combination of a trench isolation region with a selective oxidation isolation region, which is involved in a semiconductor device including bipolar transistor circuits.
In recent years, a semiconductor device including both emitter coupled logic circuits (ECL circuits)involving super high speed performance bipolar transistors and super high integrated complementary metal oxide semiconductor transistor circuits (CMOS circuits) with a low power consumption has been developed and known in the art. In such a semiconductor device, both the ECL circuits and the CMOS circuits, especially serving as memory device are formed on a single chip. With respect to isolation of such a semiconductor device, the isolation of the CMOS circuit region involved in the semiconductor device utilizes a selective oxidation such as a local oxidation of silicon (LOCOS). The isolation of the ECL circuit region involving such bipolar transistors utilizes a combination of the selective oxidation such as a local oxidation of silicon (LOCOS) with a trench isolation.
The conventional method of forming the isolation region comprising the combination of the selective oxidation isolation region with the trench isolation region, which is involved in the bipolar transistor ECL circuit region of the semiconductor device, will now be described with reference to FIGS. 1A to 1E.
With reference to FIG. 1A, the bipolar transistor circuit region of the semiconductor device has a p-type silicon substrate 1. An n.sup.+ -type silicon buried layer 2 is formed on the p-type silicon substrate 1. An n.sup.- -type epitaxial layer 3 is so formed as to overly the n.sup.+ -type silicon buried layer 2. A silicon nitride film 4 having a predetermined thickness is so deposited as to cover an entire surface of the n.sup.- -type epitaxial layer 3. The silicon nitride film 4 is subjected to patterning so as to form an opening having a predetermined size. An etching process is accomplished by using the patterned silicon nitride film 4 as a mask so that the n.sup.- -type epitaxial layer 3 and the n.sup.+ -type silicon buried layer 2 are removed but only directly under the opening region of the silicon nitride film 4. Further, the p-type silicon substrate 1 is removed up to a predetermined depth but only directly under the opening region of the silicon nitride film 4. As a result of these steps, a trench groove having predetermined sizes in the length, the width and the depth is formed in the three layers comprising the p-type silicon substrate 1, the n -type silicon buried layer 2 and the n.sup.- -type epitaxial layer 3. After that, a silicon oxide film 5 having a thickness in the range from 1500 to 2000 angstroms is so formed as to cover an entire surface of the inner walls of the trench groove.
With reference to FIG. 1B, a polycrystalline silicon material 6 is deposited on the silicon oxide film 5 covering the inner wall surface of the trench groove so that the trench groove is completely filled with the polycrystalline silicon material 6. Further, the polycrystalline silicon material 6 except within the trench groove is unnecessary and thus is so removed as to have the polycrystalline silicon material 6 remain within the trench groove only.
With reference to FIG. 1C, a removal of the silicon nitride film 4 which has been finished serving as the mask for the etching process follows the removal of the unnecessary portions of the polycrystalline silicon material 6. The result of the removal of both the silicon nitride film 4 and the unnecessary portions of the polycrystalline silicon material 6 is that an upper surface of the n.sup.- -type epitaxial layer 3 is exposed. Subsequently, the n.sup.- -type epitaxial layer 3 is oxidized but only a surface region thereof having a depth in the range from 300 to 500 angstroms thereby resulting in a formation of a silicon oxide film having a thickness in the range from 300 to 500 angstroms, while an illustration thereof is omitted. In addition to the above, a polycrystalline silicon film 7 is deposited up to a thickness in the range from 500 to 1000 angstroms so as to cover the exposed upper surfaces of the n.sup.- -type epitaxial layer 3, of the silicon oxide film 5 and of the polycrystalline silicon material 6 within the trench groove. After that, a silicon nitride film 8 is deposited on the polycrystalline silicon film 7 up to a thickness in the range from 2000 to 3000 angstroms.
With reference to FIG. 1D, the silicon nitride film 8 is subjected to patterning so that a silicon nitride film 8 is removed but only a predetermined area thereof overlying the trench groove and its vicinity portions. The result of the patterning is that the silicon oxide film 8 is formed with an opening area, whose peripheral edge fences the trench groove and the n.sup.- -type epitaxial layer 3 in the vicinity portions of trench groove.
With reference to FIG. 1E, a selective oxidization is implemented by using the patterned silicon nitride film 8 as a mask. The result of the selective oxidization is that the trench groove and its vicinity portions in the trench groove the n.sup.- -type epitaxial layer 3 underlying the opening area of the silicon nitride film 8 are oxidized up to a depth in the range from 4000 to 8000 angstroms. Thus, a thick silicon oxide film 9 is formed in the surface area of the device except for the covered area by the patterned silicon nitride film 8 thereby completing a formation of the isolation region comprising the combination of the trench isolation region with the selective oxidation film.
By the way, it is no doubt apparent that such semiconductor integrated circuit devices such as the bipolar transistor ECL circuits are required to have a higher degree of its integration. The enlargement of a degree of the integration of the semiconductor integrated circuit device forces each element involved in the semiconductor integrated circuit device to be minimized, in addition distances between elements of the semiconductor integrated circuit device to be shorted. Needless to say, such minimization of each element involved in the semiconductor integrated circuit device forces minimizing the isolation region comprising the combination of the trench isolation and the selective oxidation isolation.
As the minimization of the isolation region of the device is improved, the above conventional method of forming the isolation region comprising the combination of the trench isolation region with the selective oxidation film is, however, engaged with following disadvantages. For example, when an edge portion of the selective oxide film, or the silicon oxide film 9 has a larger distance than approximately 1.5 micrometers in the horizontal direction from the trench isolation region, or the silicon oxide film 5, disadvantages with the isolation region involved in the semiconductor integrated circuit device is not considerable. In contrast to the above, when an edge portion of the selective oxide film, or the silicon oxide film 9 has a smaller distance than approximately 1.0 micrometers in the horizontal direction from the trench isolation region, or the silicon oxide film 5, disadvantages with the isolation region involved in the semiconductor integrated circuit device is considerable.
Disadvantages with the isolation region comprising the combination of the trench isolation region with the selective oxidation isolation region will subsequently be described with referring to FIG. 1E.
One of disadvantages with the isolation region is associated with crystal defects generated in the silicon oxide film 9 of the isolation region. When an edge portion of the selective oxide film, or the silicon oxide film 9 has a smaller distance than approximately 1.0 micrometers in the horizontal direction from the trench isolation region, or the silicon oxide film 5, stresses possessed by crystals of the silicon oxide material are caused at the edge portion of the selective oxide film, or the silicon oxide film 9. Concurrently, the selective oxidation of the selective oxidation film causes an additional stress possessed by the crystal of silicon oxide in the selective oxide film, or the silicon oxide film 9 but at the overlapping region with and in the vicinity in the silicon oxide film 5 within the trench groove.
With respect to the oxidation mechanism of the selective oxidation film, the silicon oxide film 5 within the trench groove essentially includes silicon which has been oxidized, and thus no silicon material to be oxidized by the selective oxidation, although the polycrystalline silicon film 7 overlaying the silicon oxide film 5 includes silicon which will be oxidized by the selective oxidation. Then, the existence of the silicon oxide film 5 renders the growth of the selective oxidation film, or the silicon oxide film 9 difficult. In contrast to the above, both the polycrystalline silicon material 6 and the n.sup.- -type epitaxial layer 3 are possessive of a sufficient deal of the silicon material to be oxidized by the selective oxidation, followed by being made into the silicon oxide film 9. Thus, the silicon oxide film 9 but at the overlapping region with and in the vicinity of the silicon oxide film 5 is grown at a lower growth rate than the growth rates of the other portions, for example, the polycrystalline silicon material and the n.sup.- -type epitaxial layer 3, Such difference of the growth rates generates stresses possessed by the crystal of the silicon oxide mainly in the vertical direction but especially at the overlapping region with and in the vicinity of the silicon oxide film 5. The cooperation of the both stresses of the silicon oxide film at its edge portions and in the vicinity of the silicon oxide film 5 generates a great deal of dislocations in the crystal of the silicon oxide. It is considerable that such dislocation caused in the selective oxide film, or the silicon oxide film 9 are likely to cause many crystal defects. The selective oxidation film, or the silicon oxide film 9 which is possessive of a great deal of the crystal defects will no longer serve as the isolation region. The results of those forces the yield of the products to substantially be lowered.
Another disadvantage with the isolation region is that the selective oxidation film, or the silicon oxide film 9 has depression regions, and thus has an irregularity in its surface. Descriptions with respect to the oxidation mechanism of the selective oxidation film, especially in the vicinity of the silicon oxide film 5, will subsequently be made to appear. The silicon oxide film 5 within the trench groove essentially includes silicon which has been oxidized, and thus no silicon material to be oxidized by the selective oxidation, although the polycrystalline silicon film 7 overlaying the silicon oxide film 5 includes silicon which will be oxidized by the selective oxidation. Then, at the oxidation process, the presence of the silicon oxide film 5 serves to prevent the growth of the selective oxidation film, or the silicon oxide film 9. In contrast to the above, both the polycrystalline silicon material 6 and the n.sup.- -type epitaxial layer 3 are possessive of a sufficient deal of the silicon material to be oxidized by the selective oxidation, followed by being made into the silicon oxide film 9. Thus, the silicon oxide film 9 but at the overlapping region with and in the vicinity of the silicon oxide film 5 is grown at a lower growth rate than the growth rates of the other portions, for example, the polycrystalline silicon material 6 and the n.sup.- -type epitaxial layer 3. Such differences in the growth rates causes a formation of depression portions 11 in a surface of the resultant selective oxidation film, or the silicon oxide film 9. The depression portions 11 exist directly over the silicon oxide film 5 within the trench groove due to the difference in the growth rates between the vicinity portions of the silicon oxide film 5 and the opposite portion. The existence of the depression portions 11 in the surface of the selective oxidation film, or the silicon oxide film 9 causes following disadvantages. For example, there is a case that the resultant selective oxidation film, or the silicon oxide film 9 is covered by a deposition of a polycrystalline silicon film in after fabrication processes of the semiconductor integrated circuit device. The deposited polycrystalline silicon film is subsequently removed but over the resultant selective oxidation film, or the silicon oxide film 9. In this case, although the polycrystalline silicon film over the selective oxidation film is to be completely removed, a part of the polycrystalline silicon film is likely to remain at the depression portion 11 in the surface of the selective oxidation film . Such polycrystalline silicon film remaining at the depression portions 11 cause electrical short circuits. Further, such depression portions 11 is likely to accumulate dusts.
From the set forth descriptions, the disadvantages provided by the crystal defects and the depression portions 11 with such isolation region are caused by that the selective oxidation film, or the silicon oxide film 9 but at the overlapping region with and in the vicinity of the silicon oxide film 5 is lack of silicon materials which will be oxidized by the selective oxidation to be made into a part of the silicon oxide film 9. For the oxidation process, the silicon oxide film 9 but at the overlapping region with and in the vicinity of the silicon oxide film 5 has a lower growth rate than the growth rates of the polycrystalline silicon material 6 and the n.sup.- -type epitaxial layer 3, both of which have a sufficient deal of silicon materials which will be oxidized, followed by being made into the silicon oxide film 9. Such difference in the growth rates is caused by the existence of the silicon oxide film 5 within a region which will be made into the silicon oxide film 9. Thus, that the silicon oxide film 5 exists within a region which will be made into the silicon oxide film 9 causes the above disadvantages.
To combat this advantages with the method of forming the isolation region comprising the combination of the selective oxidation film and the trench isolation region, it is required to develop a novel method which is permissive of preventing any stress of the silicon oxide crystal involved in the selective oxidation film to be caused by the selective oxidation but at the overlapping region with and in the vicinity of the silicon oxide film 5 within the trench groove. Further, it is required to develop a novel method which is permissive of preventing any depression portion to be formed in the surface of the resultant selective oxidation film and thus the surface of the resultant selective oxidation film to have irregularity.